1 ha-4900, HA-4902, ha-4905 precision quad comparators the ha-4900 series are monolithic, quad, precision comparators offering fast response time, low offset voltage, low offset current and virtually no channel-to-channel crosstalk for applications requiring accurate, high speed, signal level detection. these comparators can sense signals at ground level while being operated from either a single +5v supply (digital systems) or from dual supplies (analog networks) up to 15v. the ha-4900 series contains a unique current driven output stage which can be connected to logic system supplies (v logic + and v logic -) to make the output levels directly compatible (no external components needed) with any standard logic or special system logic levels. in combination analog/digital systems, the design employed in the ha-4900 series input and output stages prevents troublesome ground coupling of signals between analog and digital portions of the system. these comparators?combination of features make them ideal components for signal detection and processing in data acquisition systems, test equipment and microprocessor/analog signal interface networks. for military grade product, refer to the HA-4902/883 data sheet. pinout ha-4900, HA-4902 (cerdip) ha-4905 (pdip, cerdip, soic) top view features fast response time . . . . . . . . . . . . . . . . . . . . . . . . 130ns low offset voltage . . . . . . . . . . . . . . . . . . . . . . . . . 2.0mv low offset current . . . . . . . . . . . . . . . . . . . . . . . . . . .10na single or dual voltage supply operation selectable output logic levels active pull-up/pull-down output circuit. no external resistors required applications threshold detector zero crossing detector window detector analog interfaces for microprocessors high stability oscillators logic system interfaces 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 v l + out 1 -in 1 +in 1 v- +in 2 out 2 -in 2 out 4 +in 4 v+ +in 3 -in 3 out 3 v l - -in 4 1 - + 2 - + 4 - + 3 - + ordering information part number temp range ( o c) package pkg. no. ha1-4900-2 -55 to 125 16 ld cerdip f16.3 ha1-4902-2 -55 to 125 16 ld cerdip f16.3 ha1-4905-5 0 to 75 16 ld cerdip f16.3 ha3-4905-5 0 to 75 16 ld pdip e16.3 ha9p4905-5 0 to 75 16 ld soic m16.3 data sheet september 1998 file number 2855.3 caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 321-724-7143 | copyright intersil corporation 1999
2 absolute maximum ratings thermal information supply voltage (between v+ and v- terminals) . . . . . . . . . . . . 33v differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15v voltage between v logic + and v logic -. . . . . . . . . . . . . . . . . . .18v output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50ma power dissipation (notes 1, 2) operating conditions temperature range ha-4900-2, HA-4902-2. . . . . . . . . . . . . . . . . . . . . -55 o c to 125 o c ha-4905-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 o c to 75 o c thermal resistance (typical, note 3) ja ( o c/w) jc ( o c/w) cerdip package. . . . . . . . . . . . . . . . . 85 25 pdip package . . . . . . . . . . . . . . . . . . . 90 n/a soic package . . . . . . . . . . . . . . . . . . . 100 n/a maximum junction temperature (ceramic package) . . . . . . .175 o c maximum junction temperature (plastic package) . . . . . . . . .150 o c maximum storage temperature range . . . . . . . . . . -65 o c to 150 o c maximum lead temperature (soldering 10s) . . . . . . . . . . . . 300 o c (soic - lead tips only) die characteristics back side potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v- number of transistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 die size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 mils x 105 mils caution: stresses above those listed in ?bsolute maximum ratings may cause permanent damage to the device. this is a stress only rating and operatio n of the device at these or any other conditions above those indicated in the operational sections of this speci?ation is not implied. notes: 1. maximum power dissipation, including output load, must be designed to maintain the junction temperature below 175 o c for ceramic packages, and below 150 o c for plastic packages. 2. total power dissipation (t.p.d.) is the sum of individual dissipation contributions of v+, v- and v logic shown in curves of power dissipation vs supply voltages (see performance curves). the calculated t.p.d. is then located on the graph of maximum allowable package dissipation vs ambient temperature to determine ambient temperature operating limits imposed by the calculated t.p.d. (see performance curves). for instance, the combination of +15v, -15v, +5v, 0v (v+, v-, v logic +, v logic -) gives a t.p.d. of 350mw, the combination +15v, -15v, +15v, 0v gives a t.p.d. of 450mw. 3. ja is measured with the component mounted on an evaluation pc board in free air. electrical speci?ations v supply = 15v , v logic + = 5v, v logic - = gnd parameter temp ( o c) ha-4900-2 -55 o c to 125 o c HA-4902-2 -55 o c to 125 o c ha-4905-5 0 o c to 75 o c units min typ max min typ max min typ max input characteristics offset voltage (note 4) 25 - 2 3 - 2 5 - 4 7.5 mv full - - 4 - - 8 - - 10 mv offset current 25 - 10 25 - 10 35 - 25 50 na full - - 35 - - 45 - - 70 na bias current (note 5) 25 - 50 75 - 50 150 - 100 150 na full - - 150 - - 200 - - 300 na input sensitivity (note 6) 25 - - v io + 0.3 --v io + 0.5 --v io + 0.5 mv full - - v io + 0.4 --v io + 0.6 --v io + 0.7 mv common mode range full v- - (v+) - 2.4 v- - (v+) - 2.6 v- - (v+) - 2.4 v differential input resistance 25 - 250 - - 250 - - 250 - m ? transfer characteristics large signal voltage gain 25 - 400 - - 400 - - 400 - kv/v response time (t pd (0)) (note 7) 25 - 130 200 - 130 200 - 130 200 ns response time (t pd (1)) (note 7) 25 - 180 215 - 180 215 - 180 215 ns ha-4900, HA-4902, ha-4905
3 output characteristics output voltage level logic ?ow state?(v ol ) (note 8) full - 0.2 0.4 - 0.2 0.4 - 0.2 0.4 v logic ?igh state?(v oh ) (note 8) full 3.5 4.2 - 3.5 4.2 - 3.5 4.2 - v output current i sink full 3.0 - - 3.0 - - 3.0 - - ma i source full 3.0 - - 3.0 - - 3.0 - - ma power supply characteristics supply current, i ps (+) 25 - 6.5 20 - 6.5 20 - 7 20 ma supply current, i ps (-) 25 - 4 8 - 4 8 - 5 8 ma supply current, i ps (logic) 25 - 3.5 4 - 3.5 4 - 3.5 4 ma supply voltage range v logic + (note 2) full 0 - +15.0 0 - +15.0 0 - +15.0 v v logic - (note 2) full -15.0 - 0 -15.0 - 0 -15.0 - 0 v notes: 4. minimum differential input voltage required to ensure a defined output state. 5. input bias currents are essentially constant with differential input voltages up to 9v. with differential input voltages from 9v to 15v, bias cur- rent on the more negative input can rise to approximately 500 a. this will also cause higher supply currents. 6. v cm = 0v. input sensitivity is the worst case minimum differential input voltage required to guarantee a given output logic state. this parameter includes the effects of offset voltage and voltage gain. 7. for t pd (1); 100mv input step, -10mv overdrive. for t pd (0); -100mv input step, 10mv overdrive. frequency 100hz; duty cycle 50%; invert- ing input driven. see figure 1 for test circuit. all unused inverting inputs tied to +5v. 8. for v oh and v ol :i sink = i source = 3.0ma. for other values of v logic ; v oh (min) = v logic + -1.5v. electrical speci?ations v supply = 15v , v logic + = 5v, v logic - = gnd (continued) parameter temp ( o c) ha-4900-2 -55 o c to 125 o c HA-4902-2 -55 o c to 125 o c ha-4905-5 0 o c to 75 o c units min typ max min typ max min typ max test circuit and waveform figure 1. dut - + +15v +5v -15v v out 100mv overdrive t pd (0) 1.5v t pd (0) t = 0 v th = 0v input output 100mv overdrive 1.5v t pd (1) t = 0 v th = 0v t pd (1) ha-4900, HA-4902, ha-4905
4 applying the ha-4900 series comparators supply connections this device is exceptionally versatile in working with most available power supplies. the voltage applied to the v+ and v- terminals determines the allowable input signal range; while the voltage applied to the v l + and v l - determines the output swing. in systems where dual analog supplies are available, these would be connected to v+ and v-, while the logic supply and return would be connected to v logic + and v logic -. the analog and logic supply commons can be connected together at one point in the system, since the comparator is immune to noise on the logic supply ground. a negative output swing may be obtained by connecting v l + to ground and v l - to a negative supply. bipolar output swings (15v p-p , max) may be obtained using dual supplies. in systems where only a single logic supply is available (+5v to 15v), v+ and v logic + may be connected together to the positive supply while v- and v logic - are grounded. if an input signal could swing negative with respect the v- terminal, a resistor should be connected in series with the input to limit input current to < 5ma since the c-b junction of the input transistor would be forward biased. unused inputs inputs of unused comparator sections should be tied to a differential voltage source to prevent output ?hatter. crosstalk simultaneous high frequency operation of all other channels in the package will not affect the output logic state of a given channel, provided that its differential input voltage is suf?ient to de?e a given logic state ( ? v in ? v os ). low level or high impedance input lines should be shielded from other signal sources to reduce crosstalk and interference. power supply decoupling decouple all power supply lines with 0.01 f ceramic capacitors to ground line located near the package to reduce coupling between channels or from external sources. response time fast rise time (<200ns) input pulses of several volts amplitude may result in delay times somewhat longer than those illustrated for 100mv steps. operating speed is optimized by limiting the maximum differential input voltage applied, with resistor-diode clamping networks. typical applications data acquisition system in this circuit the ha-4900 series is used in conjunction with a d to a converter to form a simple, versatile, multi-channel analog input for a data acquisition system. in operation the processor ?st sends an address to the d to a, then the processor reads the digital word generated by the comparator outputs. to perform a simple comparison, the processor sets the d to a to a given reference level, then examines one or more comparator outputs to determine if their inputs are above or below the reference. a window comparison consists of two such cycles with 2 reference levels set by the d to a. one way to digitize the inputs would be for the processor to increment the d to a in steps. the d to a address, as each comparator switches, is the digitized level of the input. while stairstepping the d to a is slower than successive approximation, all channels are digitized during one staircase ramp. schematic diagram q 9d bias 2 one fourth only r 20d 1k ? r 20c 1k ? r 20b 1k ? r 20a 1k ? q 9c q 9b q 9a r 21 1k ? q 10 d 9a bias 1 q 5 q 4 d 4a d 4b q 4c q 3 r 16 540 ? pr 1 200k ? r 10 4k ? q 2 q 1 r 9 4k ? bias 3 bias 4 q 11 +in q 17 q 18 q 12 q 13 r 1 500 ? r 2 13k ? r 3 1k ? q 19 q 20 q 14 r 4 1k ? q 21 q 22 -in m n1 r 7 2.5k ? r 6 2.5k ? q 16 q 7 q 23 r 5 360 ? m n2 m n3 q 24 q 25 r 18 664 ? q 38 m n4 d 45 d 11a q 26 r 17 19k ? r 14 5k ? q 33 q 34 q 36 q 37 q 30 q 28 r 11 8k ? r 15 8k ? q 31 r 23 100 ? r 24 14k ? d 29b q 29 q 29a r 22 100 ? r 12 8k ? q 32 m n6 m n5 v logic - out v logic + v- v+ q 15 d 35 d 39 ha-4900, HA-4902, ha-4905
5 logic level translators the ha-4900 series comparators can be used as versatile logic interface devices as shown in the circuits above. negative logic devices may also be interfaced with appropriate supply connections. if separate supplies are used for v- and v logic -, these logic level translators will tolerate several volts of ground line differential noise. rs-232 to cmos line receiver this rs-232 type line receiver to drive cmos logic uses a schmitt trigger feedback network to give about 1v input hysteresis for added noise immunity. a possible problem in an interface which connects two equipments, each plugged into a different ac receptacle, is that the power line voltage may appear at the receiver input when the interface connection is made or broken. the two diodes and a 3w input resistor will protect the inputs under these conditions. window detector the high switching speed, low offset current and low offset voltage of the ha-4900 series makes this window detector circuit extremely well suited to applications requiring fast, accurate, decision-making. the circuit above is ideal for industrial process system feedback controllers or ?ut-of- limit?alarm indicators. oscillator/clock generator this self-starting ?ed frequency oscillator circuit gives excellent frequency stability. r 1 and c 1 comprise the frequency determining network while r 2 provides the regenerative feedback. diode d 1 enhances the stability by compensating for the difference between v oh and v supply . in applications where a precision clock generator up to 100khz is required, such as in automatic test equipment, c 1 may be replaced by a crystal. schmitt trigger (zero crossing detector with hysteresis) this circuit has a 100mv hysteresis which can be used in applications where very fast transition times are required at the output even though the signal input is very slow. the hysteresis loop also reduces false triggering due to noise on the input. the waveforms below show the trip points developed by the hysteresis loop. memory micro- processor interface interface d/a comparators processor latch analog inputs analog input module 1/4 ha-4900 + - 4.7k ? v l + 1n914s +5.0v 1/4 ha-4900 + - ttl to cmos 1/4 ha-4900 + - 10k ? v+ +5.0v 1/4 ha-4900 + - cmos to ttl +5v to +15v 10k ? 1/4 ha-4900 + - +10v 4.7k ? 3w 1k ? 1n4001s 56k ? 51k ? 1k ? + - v l + +15v + - -15v 1/2 ha-4900 input low ref high ref high low in window +5.0v 1/4 hd-74c02 1/4 ha-4900 + - v+ 150k ? 150k ? r 2 150k ? v+ r 1 50k ? c 1 f 1 2.1r 1 c 1 ----------------------- - d 1 1n914 ha-4900, HA-4902, ha-4905
6 input to output waveform showing hysteresis trip points +15v r 1 100 ? -15v +5v r 3 13k ? -15v v oh 4.2v r 2 2k ? 1/4 ha-4900 + - 0v v trip + v trip - v oh typical performance curves t a = 25 o c, v s = 15v, v logic + = 5v, v logic - = 0v, unless otherwise specified figure 2. input bias current vs temperature figure 3. input offset current vs temperature figure 4. input bias current vs common mode input voltage (v diff = 0v) input bias current (na) 100 80 60 40 20 0 -55 -25 0 25 50 75 100 125 temperature ( o c) 15 10 5 0 input offset current (na) -55 -25 0 25 50 75 100 125 temperature ( o c) -15 -12 -9 -6 -3 0 +3 +6 +9 +12 +15 common mode input voltage 80 60 40 20 0 input bias current (na) ha-4900, HA-4902, ha-4905
7 figure 5. supply current vs temperature (for 15v supplies and +5v logic supply) figure 6. supply current vs temperature (for single +5v operation) figure 7. response time for various input overdrives figure 8. maximum package dissipation vs ambient temperature figure 9. power dissipation vs supply voltage (no load condition) typical performance curves t a = 25 o c, v s = 15v, v logic + = 5v, v logic - = 0v, unless otherwise specified (continued) -50 -25 0 25 50 75 100 125 temperature ( o c) 12 10 8 6 4 2 0 supply current (ma) v logic + = 5v v logic - = gnd i ps +, v out = l i ps +, v out = h i ps -, v out = l i ps -, v out = h i ps l, v out = l i ps l, v out = h v s = 15v -50 -25 0 25 50 75 100 125 temperature ( o c) 5 4 3 2 1 0 supply current (ma) v+ = 5v, v- = gnd v logic + = 5v v logic - = gnd i ps l, v out = h i ps +, v out = h i ps +, v out = l i ps l, v out = l 6 7 5 4 3 2 1 0 0 -100mv v out (v) v in 0 100 200 300 400 time (ns) overdrive = 20mv overdrive = 5mv overdrive = 2mv 5 4 3 2 1 0 +100mv v out (v) v in 0 0 100 200 300 400 time (ns) overdrive = 20mv overdrive = 5mv overdrive = 2mv 0 25 50 75 100 125 temperature ( o c) 2.0 1.75 1.50 1.25 1.0 0.75 0.50 0.25 0 package dissipation (w) cerdip pdip soic power dissipation (mw) 250 200 150 100 50 0 2 4 6 8 10 12 14 supply voltage (v) v+ v- v logic + 0 ha-4900, HA-4902, ha-4905
8 all intersil semiconductor products are manufactured, assembled and tested under iso9000 quality systems certi?ation. intersil semiconductor products are sold by description only. intersil corporation reserves the right to make changes in circuit design and/or spec ifications at any time with- out notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnished by intersil is b elieved to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of th ird parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see web site www.intersil.com sales of?e headquarters north america intersil corporation p. o. box 883, mail stop 53-204 melbourne, fl 32902 tel: (321) 724-7000 fax: (321) 724-7240 europe intersil sa mercure center 100, rue de la fusee 1130 brussels, belgium tel: (32) 2.724.2111 fax: (32) 2.724.22.05 asia intersil (taiwan) ltd. 7f-6, no. 101 fu hsing north road taipei, taiwan republic of china tel: (886) 2 2716 9310 fax: (886) 2 2715 3029 ha-4900, HA-4902, ha-4905
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